• People who create and work with EPL-ME


Welcome to the Ethernet POWERLINK – Made Easy project

EPL-ME is an easy to use EPL implementation for Xilinx FPGA devices. It is originally created on University Of Southern Denmark (SDU) for their SDU-viking racing team.

Some of the features include

  • Custom made VHDL MAC layer created specific for EPL
  • 3 port hub - allowing both star and bus topology
  • NMT state machine in C, running on a MicroBlaze

EPL-ME is in its current state under high development as a master thesis project.


2010-04-18 Bootloader Version 2.0 released

On the Release page, the source code can be obtained. It consist of 6 parts:

  • A basis VHDL hardware design, which can be extended with custom VHDL modules.
  • A basis Xilinx XPS design, consisting of a dual Microblaze setup
  • Bootloader written in C for both Microblazes. To be placed in the bitfile for the FPGA, and starts executing from the microblazes block RAM when the FPGA is powered on.
  • A makefile system possible to use on both Windows and Linux platforms
  • An user guide for getting started with the bootloader
  • An API for creating user applications

Take a look on the code, and you are welcome to return any comments about the code.

2009-12-28 Website updated

The main page is updated as part of the thesis preparation

Last modified 7 years ago Last modified on 04/18/10 15:09:05